Sim-SODA: A Unified Framework for Architectural Level Software Reliability Analysis

Semiconductor transient faults (soft errors) are becoming an increasingly critical threat to reliable software execution. With the advent of the billion transistor chip era, it is impractical to protect the entire hardware. As a result, it is crucial that the tradeoffs between reliability and performance be made at the architecture design stage. To achieve this goal, researchers need a framework to evaluate software vulnerability to transient errors at a high level. This paper describes Sim-SODA (SOftware Dependability Analysis), a unified framework for estimating microprocessor reliability in the presence of soft errors at the architectural level. Compared with previous studies, Sim-SODA covers more hardware structures and provides fine-grained reliability analysis. We present a detailed architectural reliability profile of an Alpha-21264-like superscalar microprocessor running workloads from various application domains. Additionally, we obtain program vulnerability phases and correlate them with microprocessor performance metrics.